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Prebond testing of weak defects in TSVs

Author
Arumi, D.; Rodriguez-Montanes, R.; Figueras, J.
Type of activity
Journal article
Journal
IEEE transactions on very large scale integration (VLSI) systems
Date of publication
2015-08-07
Volume
PP
Number
99
First page
31
Last page
36
DOI
https://doi.org/10.1109/TVLSI.2015.2448594 Open in new window
Repository
http://hdl.handle.net/2117/78462 Open in new window
URL
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7182374 Open in new window
Abstract
Through-silicon vias (TSVs) are critical elements in 3-D integrated circuits susceptible to defects during fabrication and lifetime. It is desirable to detect defective TSVs in the early steps of the fabrication process to prevent stacking yield loss. Thus, the development of effective prebond testing techniques becomes of great importance. In this direction, recent research effort has been devoted to the development of two main prebond techniques: 1) prebond probing and 2) built-in self-test (B...
Citation
Arumi, D., Rodriguez, R., Figueras, J. Prebond testing of weak defects in TSVs. "IEEE transactions on very large scale integration (VLSI) systems", 07 Agost 2015, vol. PP, núm. 99, p. 31-36.
Keywords
Built-in self-test, Built-in self-test (BIST), Circuit faults, Circuit stability, Inverters, Stability analysis, Through-silicon vias, design for testability, integrated circuit (IC) testing
Group of research
CRnE - Barcelona Research Center in Multiscale Science and Engineering
QINE - Low Power Design, Test, Verification and Security ICs

Participants