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Resistive open defect characteritzation in 3D 6T SRAM memories

Author
Castillo, R.; Arumi, D.; Rodriguez-Montanes, R.
Type of activity
Presentation of work at congresses
Name of edition
XXIX Conference on Design of Circuits and Integrated Systems
Date of publication
2014
Presentation's date
2014-11-26
Book of congress proceedings
Proceedings XXIX Conference on Design of Circuits and Integrated Systems
First page
1
Last page
6
Repository
http://hdl.handle.net/2117/77724 Open in new window
Abstract
The relentless decrease in feature size and the increase of density requirements in Integrated Circuit (IC) manufacturing arise new challenges that must be overcome. One of the most promising alternatives is three-dimensional integrated circuits (3D ICs). Several possibilities have been presented, but one of the clearest options is based on the use of Though-Silicon Vias (TSV) connections. The benefits and disadvantages that TSV inclusion adds to design need further studies. The implementation ...
Citation
Castillo, R., Arumi, D., Rodriguez, R. Resistive open defect characteritzation in 3D 6T SRAM memories. A: Conference on Design of Circuits and Integrated Systems. "Proceedings XXIX Conference on Design of Circuits and Integrated Systems". Madrid: 2014, p. 1-6.
Group of research
QINE - Low Power Design, Test, Verification and Security ICs

Participants