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Trace-level speculative multithreaded architecture

Author
Molina, C.; Gonzalez, A.; Tubella, J.
Type of activity
Report
Date
2001-11
Code
UPC-DAC-2001-35
Abstract
This paper presents a novel microarchitecture to exploit trace-level speculation by means of two threads working cooperatively in a speculative and non-speculative way respectively. The architecture presents two main benefits: (a) no significant penalties are introduced in presence of a misspeculation and (b) any type of trace predictor can work together with this proposal. In this way, aggressive trace predictors can be incorporated since misspeculations do not introduce significant penalties. ...
Group of research
ARCO - Microarchitecture and Compilers

Participants