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DiMP: Architectural support for direct message passing on shared memory multi-cores

Author
Titos, R.; Palomar, Ó.; Unsal, O.; Cristal, A.
Type of activity
Presentation of work at congresses
Name of edition
44th International Conference on Parallel Processing
Date of publication
2015
Presentation's date
2015-09
Book of congress proceedings
2015 International Conference on Parallel Processing: the 44th Annual Conference, ICPP 2015: 1-4 September 2015, Beijing, China: proceedings
First page
130
Last page
139
DOI
https://doi.org/10.1109/ICPP.2015.22 Open in new window
URL
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=7349568 Open in new window
Abstract
Thanks to programming approaches like actor-based models, message passing is regaining popularity outside large-scale scientific computing for building scalable distributed applications in many-core processors. Unfortunately, the mismatch between message passing models and today's shared-memory hardware provided by commercial vendors results in suboptimal performance and loss of efficiency. This paper presents a set of architectural extensions to reduce the overheads incurred by message passing ...
Keywords
Cache coherence, Cache memory, Computer architecture, Data transfer, Distributed applications, Hardware, Hardware implementations, Instruction set extension, Memory architecture, Message passing libraries, Multicore architectures, Reconfigurable hardware, Shared memory, Sub-optimal performance
Group of research
CAP - High Performace Computing Group

Participants

  • Titos Gil, Rubén  (author and speaker )
  • Palomar Pérez, Óscar  (author and speaker )
  • Unsal, Osman Sabri  (author and speaker )
  • Cristal Kestelman, Adrian  (author and speaker )