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Near-optimal padding for removing conflict misses

Author
Vera, F.J.; Gonzalez, A.; Llosa, J.
Type of activity
Report
Date
2000-11
Code
UPC-DAC-2000-71
Abstract
The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transformations such as padding, which is a code transformation targeted to reduce conflict misses. This paper presents a novel approach to perform near-optimal padding based on Cache Miss Equations and genetic algorithms. The results show that it can remove practically all conflicts among variables in the SPECfp95.
Group of research
ARCO - Microarchitecture and Compilers
CAP - High Performace Computing Group

Participants