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Enhancing the performance of output-capacitorless LDO regulators by pass-transistor segmentation

Autor
Shirmohammadli, V.; Saberkari, A.; Martinez, H.; Alarcon, E.
Tipus d'activitat
Presentació treball a congrés
Nom de l'edició
2016 IEEE International Symposium on Circuits and Systems
Any de l'edició
2016
Data de presentació
2016-05
Llibre d'actes
2016 IEEE International Symposium on Circuits and Systems (ISCAS 2016): Montreal, Quebec, Canada: 22-25 May 2016
Pàgina inicial
490
Pàgina final
493
Editor
Institute of Electrical and Electronics Engineers (IEEE)
DOI
10.1109/ISCAS.2016.7527284
Repositori
http://hdl.handle.net/2117/100765 Obrir en finestra nova
URL
http://ieeexplore.ieee.org/document/7527284/ Obrir en finestra nova
Resum
This paper deals with a circuit proposal along with theoretical analysis to provide a solution for enhancing the stability and transient performance of external capacitorless low-dropout regulators (CL-LDOs) by segmenting the pass transistor to smaller sizes. The stability and transient analysis is carried out on the CL-LDO with two different size-segmented pass transistors in comparison with the conventional CL-LDO with single large size pass device. The analysis shows that the pass transistor ...
Citació
Shirmohammadli, V., Saberkari, A., Martinez, H., Alarcon, E. Enhancing the performance of output-capacitorless LDO regulators by pass-transistor segmentation. A: IEEE International Symposium on Circuits and Systems. "2016 IEEE International Symposium on Circuits and Systems (ISCAS 2016): Montreal, Quebec, Canada: 22-25 May 2016". Montréal, Quebec: Institute of Electrical and Electronics Engineers (IEEE), 2016, p. 490-493.
Paraules clau
CL-LDO, CMOS process, HSPICE, external capacitorless low-dropout regulators, pass transistor segmentation, phase margin, size 0.35 mum, size-segmented pass transistors, transient analysis
Grup de recerca
EPIC - Energy Processing and Integrated Circuits
PERC-UPC - Centre de Recerca d'Electrònica de Potència UPC

Participants