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Improving Prefetching Mechanisms for Tiled CMP Platforms

Author
Torrents, M.
Type of activity
Theses
Defense's date
2016-11-28
URL
http://hdl.handle.net/2117/106295 Open in new window
Abstract
Recently, high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures to deal with instruction level parallelism limitations and, more important, to manage the power consumption that is becoming unaffordable due to the increased transistor count and clock frequency. At the present moment, this architecture, which implements multiple processing cores on a single die, is commercially available with up to twenty four processors on a single chip and there are roadm...
Group of research
ARCO - Microarchitecture and Compilers
Citation
Torrents Lapuerta, M. "Improving prefetching mechanisms for tiled CMP platforms". Tesi doctoral, UPC, Departament d'Arquitectura de Computadors, 2016.

Participants

  • Torrents Lapuerta, Marti  (author)
  • Marcuello Pascual, Pedro  (chair)
  • Martinez Morais, Raul  (director)
  • Canal Corretger, Ramon  (secretary)
  • Sanchez García, José Luis  (president)
  • Gonzalez Colas, Antonio Maria  (speaker)
  • Molina Clemente, Carlos  (director)

Attachments