Loading...
Loading...

Go to the content (press return)

Architectural tuning of the cyclic reduction algorithm on vector uniprocessors

Author
Larriba, J.; Valero, M.; Navarro, J.; Herrada, E.
Type of activity
Report
Date
1991
Code
UPC-DAC-91-21
Abstract
In this paper we propose an algorithm to solve tridiagonal systems of equipations on SIMD vector uniprocessors. The algorithm is a modification of the Cyclic Reduction algorithm (CR). The variation exploits the way in which interleaved memories are built to speed up the algorithm. The proposed algorithm is compared with the CR algorithm and with another variation proposed in previous works. The algorithm proposed is based on the replication of data and for this reason it needs an increment of me...
Group of research
CAP - High Performace Computing Group
DAMA-UPC - Data Management Group

Participants