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A transistor array chip for the statistical characterization of process variability, RTN and BTI/CHC aging

Author
Diaz Fortuny, J.; Martin, J.; Castro Lopez, R.; Roca, E.; Fernández, F.; Barajas, E.; Aragones, X.; Mateo, D.
Type of activity
Presentation of work at congresses
Name of edition
14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
Date of publication
2017
Presentation's date
2017-06-13
Book of congress proceedings
Proceedings of the 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)
First page
1
Last page
4
DOI
https://doi.org/10.1109/SMACD.2017.7981600 Open in new window
URL
https://ieeexplore.ieee.org/document/7981600/ Open in new window
Group of research
HIPICS - High Performance Integrated Circuits and Systems

Participants

  • Diaz Fortuny, Javier  (author and speaker )
  • Martin Martínez, Javier  (author and speaker )
  • Castro López, Rafael  (author and speaker )
  • Roca Moreno, Elisenda  (author and speaker )
  • Fernández Fernández, Francisco V.  (author and speaker )
  • Barajas Ojeda, Enrique  (author and speaker )
  • Aragones Cervera, Xavier  (author and speaker )
  • Mateo Peña, Diego Cesar  (author and speaker )