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Enhanced intrinsic voltage gain in artificially stacked bilayer CVD graphene field effect transistors

Author
Pandey, H.; Aguirre, J.; Kataria, S.; Fregonese, S.; Passi, V.; Iannazzo, M.; Zimmer, T.; Alarcon, E.; Lemme, M.
Type of activity
Journal article
Journal
Annalender physik
Date of publication
2017-09-20
Volume
529
Number
11
First page
1
Last page
9
DOI
https://doi.org/10.1002/andp.201700106 Open in new window
URL
http://onlinelibrary.wiley.com/doi/10.1002/andp.201700106/abstract Open in new window
Abstract
We report on electronic transport in dual-gate, artificially stacked bilayer graphene field effect transistors (BiGFETs) fabricated from large-area chemical vapor deposited (CVD) graphene. The devices show enhanced tendency to current saturation, which leads to reduced minimum output conductance values. This results in improved intrinsic voltage gain of the devices when compared to monolayer graphene FETs. We employ a physics based compact model originally developed for Bernal stacked bilayer gr...
Keywords
Artifically stacked bilayer graphene, Chemical vapor deposited (CVD) graphene, Compact modeling, Field effect transistor, Intrinsic voltage gain, TCAD simulations
Group of research
EPIC - Energy Processing and Integrated Circuits
PERC-UPC - Power Electronics Research Centre

Participants

  • Pandey, Himadri  (author)
  • Aguirre Morales, Jorge Daniel  (author)
  • Kataria, Satender  (author)
  • Fregonese, Sebastien  (author)
  • Passi, V.  (author)
  • Iannazzo Soteras, Mario Enrique  (author)
  • Zimmer, Thomas  (author)
  • Alarcon Cot, Eduardo Jose  (author)
  • Lemme, M. C.  (author)