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Maximizing multithreaded multicore architectures through thread migrations

Autor
Acosta, C. A.; Cazorla, F. J.; Santana, O.; Falcón, A.; Ramírez , A.; Valero, M.
Tipus d'activitat
Document cientificotècnic
Data
2009
Codi
UPC-DAC-RR-CAP-2009-2
Repositori
http://hdl.handle.net/2117/108861 Obrir en finestra nova
Resum
Heterogeneity in general-purpose workloads often end up in non optimal per-thread hardware resource usage. The current trend towards multicore architectures, containing several multithreaded cores, increases the need of a complexity-effective way to expose the heterogeneity in general-purpose workloads to the underlying hardware, in order to obtain all the potential performance of these architectures. In this paper we present the Heterogeneity-Aware Dynamic Thread Migrator (hDTM), a novel comple...
Citació
Acosta, C. A., Cazorla, F., Santana, O., Falcón, A., Ramírez , A., Valero, M. "Maximizing multithreaded multicore architectures through thread migrations". 2009.
Paraules clau
Heterogeneity-aware, Multicore, Thread migration
Grup de recerca
CAP - Grup de Computació d'Altes Prestacions

Participants

  • Acosta Ojeda, Carmelo Alexis  (autor)
  • Cazorla Almeida, Francisco Javier  (autor)
  • Santana Jaria, Oliverio J.  (autor)
  • Falcón Samper, Ayose Jesús  (autor)
  • Ramírez Bellido, Alejandro  (autor)
  • Valero Cortes, Mateo  (autor)

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