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Improving large-window processor performance using additional resources

Autor
González, I.; Veidenbaum, A.; Cristal, A.; Valero, M.
Tipus d'activitat
Document cientificotècnic
Data
2010
Codi
UPC-DAC-RR-CAP-2010-21
Resum
This paper proposes two novel techniques to address the problems of limited register file and load-store queue sizes and effectively increase the instruction window. The first, phantom registers, is added a large window processor (MSP) and creates phantom registers to allows instruction renaming to proceed. The one-to-one mapping from phantom to physical registers is used and is register availability is enforced in wakeup. The second technique is a load/store buffer (LSB), a FIFO structure that ...
Paraules clau
Large-window, Load/store queue, Prefetching, Register file, Register renaming
Grup de recerca
CAP - Grup de Computació d'Altes Prestacions

Participants

  • González, Isidro  (autor)
  • Veidenbaum, Alex  (autor)
  • Cristal Kestelman, Adrián  (autor)
  • Valero Cortes, Mateo  (autor)