Conflict-free strides for vectors in matched memories
Valero, M.; Lang, T.; Llaberia, J.; Peirón, M.; Navarro, N.; Ayguade, E.
Address transformation schemes, such as skewing and linear transformations, have been proposed to achieve conflict-free access to one family of strides in vector processors with matched memories. In this paper, we extend these schemes to achieve this con flict-free access for several families. The basic idea is to perform an out-of-order access to vectors of fixed length, equal to that of the vector registers of the processor. The hardware required is similar to that for the access in order.