Loading...
Loading...

Go to the content (press return)

An ultra low-power hardware accelerator for acoustic scoring in speech recognition

Author
Tabani, H.; Arnau, J.; Tubella, J.; Gonzalez, A.
Type of activity
Presentation of work at congresses
Name of edition
26th International Conference on Parallel Architectures and Compilation Techniques
Date of publication
2017
Presentation's date
2017-09-11
Book of congress proceedings
26th International Conference on Parallel Architectures and Compilation Techniques: proceedings: 9-13 September 2017: Portland, Oregon
First page
41
Last page
52
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
DOI
https://doi.org/10.1109/PACT.2017.11 Open in new window
Project funding
Intelligent, Ubiquitous and Energy-Efficient Computing Systems
Microarchitecture and Compilers for Future Processors III
Repository
http://hdl.handle.net/2117/112943 Open in new window
URL
http://ieeexplore.ieee.org/abstract/document/8091218/ Open in new window
Abstract
Accurate, real-time Automatic Speech Recognition (ASR) comes at a high energy cost, so accuracy has often to be sacrificed in order to fit the strict power constraints of mobile systems. However, accuracy is extremely important for the end-user, and today's systems are still unsatisfactory for many applications. The most critical component of an ASR system is the acoustic scoring, as it has a large impact on the accuracy of the system and takes up the bulk of execution time. The vast majority of...
Citation
Tabani, H., Arnau, J., Tubella, J., Gonzalez, A. An ultra low-power hardware accelerator for acoustic scoring in speech recognition. A: International Conference on Parallel Architectures and Compilation. "26th International Conference on Parallel Architectures and Compilation Techniques: proceedings: 9-13 September 2017: Portland, Oregon". Portland, OR: Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 41-52.
Keywords
Acoustic scoring, Automatic speech recognition, Gaussian mixture model, Hardware accelerator
Group of research
ARCO - Microarchitecture and Compilers

Participants