Loading...
Loading...

Go to the content (press return)

A low-complexity, high-performance fetch unit for simultaneous multithreading processors

Author
Falcon, A.; Alex Ramirez; Valero, M.
Type of activity
Presentation of work at congresses
Name of edition
10th International Symposium on High-Performance Computer Architecture
Date of publication
2004
Presentation's date
2004-02
Book of congress proceedings
IEE Proceedings- Software
First page
244
Last page
253
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
DOI
https://doi.org/10.1109/HPCA.2004.10003 Open in new window
Repository
http://hdl.handle.net/2117/113049 Open in new window
URL
http://ieeexplore.ieee.org/document/1410081/ Open in new window
Abstract
Simultaneous multithreading (SMT) is an architectural technique that allows for the parallel execution of several threads simultaneously. Fetch performance has been identified as the most important bottleneck for SMT processors. The commonly adopted solution has been fetching from more than one thread each cycle. Recent studies have proposed a plethora of fetch policies to deal with fetch priority among threads, trying to increase fetch performance. We demonstrate that the simultaneous sharing o...
Citation
Falcón, A., Ramírez, A., Valero, M. A low-complexity, high-performance fetch unit for simultaneous multithreading processors. A: International Symposium on High-Performance Computer Architecture. "IEE Proceedings- Software". Madrid: Institute of Electrical and Electronics Engineers (IEEE), 2004, p. 244-253.
Keywords
Multi-threading, Parallel architectures, Pipeline processing, Processor scheduling
Group of research
CAP - High Performace Computing Group

Participants

  • Falcon Samper, Ayose Jesus  (author and speaker )
  • Ramirez Bellido, Alejandro  (author and speaker )
  • Valero Cortes, Mateo  (author and speaker )

Attachments