Loading...
Loading...

Go to the content (press return)

Partial least squares identification of multi look-up table digital predistorters for concurrent dual-band envelope tracking power amplifiers

Author
Pham, T.; López, D.; Wang, T.; Montoro, G.; Gilabert, Pere L.
Type of activity
Journal article
Journal
IEEE transactions on microwave theory and techniques
Date of publication
2018-08-02
Volume
66
Number
12
First page
5143
Last page
5150
DOI
https://doi.org/10.1109/TMTT.2018.2857819 Open in new window
Repository
http://hdl.handle.net/2117/127324 Open in new window
URL
https://ieeexplore.ieee.org/document/8424883 Open in new window
Abstract
This paper presents a technique to estimate the coefficients of a multiple-look-up table (LUT) digital predistortion (DPD) architecture based on the partial least-squares (PLS) regression method. The proposed 3-D distributed memory LUT architecture is suitable for efficient FPGA implementation and compensates for the distortion arising in concurrent dual-band envelope tracking power amplifiers. On the one hand, a new variant of the orthogonal matching pursuit algorithm is proposed to properly se...
Citation
Pham, T., López, D., Wang, T., Montoro, G., Gilabert, P. L. Partial least squares identification of multi look-up table digital predistorters for concurrent dual-band envelope tracking power amplifiers. "IEEE transactions on microwave theory and techniques", 2 Agost 2018, vol. 66, núm. 12, p. 5143-5150.
Keywords
Digital predistortion (DPD), Envelope tracking (ET), Look-up tables (LUTs), Partial least squares (PLS), Power amplifier (PA), Principal component analysis (PCA)
Group of research
CSC - Components and Systems for Communications Research Group

Participants

Attachments