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Selective predicate prediction for out-of-order processors

Author
Quiñones, E.; Parcerisa, Joan-Manuel; Gonzalez, A.
Type of activity
Presentation of work at congresses
Name of edition
20th ACM International Conference on Supercomputing
Date of publication
2006
Presentation's date
2006
Book of congress proceedings
ICS'06: proceedings of the 20th Annual International Conference on Supercomputing
First page
46
Last page
54
DOI
https://doi.org/10.1145/1183401.1183410 Open in new window
URL
http://dl.acm.org/citation.cfm?id=1183410&CFID=901136572&CFTOKEN=90609145 Open in new window
Abstract
If-conversion transforms control dependencies to data dependencies by using a predication mechanism. It is useful to eliminate hard-to-predict branches and to reduce the severe performance impact of branch mispredictions. However, the use of predicated execution in out-of-order processors has to deal with two problems: there can be multiple definitions for a single destination register at rename time, and instructions with a false predicated consume unnecessary resources. Predicting predicates i...
Keywords
Confidence prediction, Predicate prediction, if-conversion
Group of research
ARCO - Microarchitecture and Compilers

Participants