Loading...
Loading...

Go to the content (press return)

Computation reuse in DNNs by exploiting input similarity

Author
Riera, M.; Arnau, J.; Gonzalez, A.
Type of activity
Presentation of work at congresses
Name of edition
The 45th International Symposium on Computer Architecture
Date of publication
2018
Presentation's date
2018-07-19
Book of congress proceedings
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA 2018): Los Angeles, California, USA: 1-6 June 2018
First page
57
Last page
68
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
DOI
https://doi.org/10.1109/ISCA.2018.00016 Open in new window
Project funding
Intelligent, Ubiquitous and Energy-Efficient Computing Systems
Repository
http://hdl.handle.net/2117/125204 Open in new window
URL
https://ieeexplore.ieee.org/document/8416818 Open in new window
Abstract
In recent years, Deep Neural Networks (DNNs) have achieved tremendous success for diverse problems such as classification and decision making. Efficient support for DNNs on CPUs, GPUs and accelerators has become a prolific area of research, resulting in a plethora of techniques for energy-efficient DNN inference. However, previous proposals focus on a single execution of a DNN. Popular applications, such as speech recognition or video classification, require multiple back-to-back executions of a...
Citation
Riera, M., Arnau, J., Gonzalez, A. Computation reuse in DNNs by exploiting input similarity. A: International Symposium on Computer Architecture. "2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA 2018): Los Angeles, California, USA: 1-6 June 2018". Institute of Electrical and Electronics Engineers (IEEE), 2018, p. 57-68.
Keywords
Back-to-back execution, Computation reuse, DNN, Deep neural networks, Degree of similarity, Different layers, Energy conservation, Energy efficiency, Energy efficient, Hardware accelerator, Hardware accelerators, Input similarity, Input similarity Decision making, Memory architecture, Network architecture, Network layers, Program processors, Speech recognition, Video classification
Group of research
ARCO - Microarchitecture and Compilers

Participants