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Architectural tuning of the cyclic reduction algorithm on vector uniprocessors

Author
Larriba, J.; Valero, M.; Navarro, J.; Herrada, E.
Type of activity
Presentation of work at congresses
Name of edition
2ª Reunión sobre Paralelismo
Date of publication
1991
Presentation's date
1991-09-01
Book of congress proceedings
Acta de la 2ª Reunión sobre Paralelismo: acción especial sobre paralelismo-2: 23-25 de Septiembre 1991, San Lorenzo de El Escorial
First page
1
Last page
17
Abstract
In this paper propose an algorithm for the solution of tridiagonal systems of equations on SIMD vector uniprocessors. The algorithm is a variation of the Cyclic Reduction algorithm (CR). The variation exploits the way in which interleaved memories are build to speed up the algorithm. The proposed algorithm is compared with the CR algorithm and another algorithm proposed in the bibliography. The algorithm proposed is based on the replication of data and for this reason it needs an increment of me...
Group of research
CAP - High Performace Computing Group
DAMA-UPC - Data Management Group

Participants