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Mainstream vs. emerging HPC: metrics, trade-offs and lessons learned

Author
Radulovic, M.; Asifuzzaman, K.; Zivanovic, D.; Rajovic, N.; Carpenter, P.; Radojkovic, P.; Ayguade, E.
Type of activity
Presentation of work at congresses
Name of edition
30th International Symposium on Computer Architecture and High Performance Computing
Date of publication
2018
Presentation's date
2018-09
Book of congress proceedings
2018 30th International Symposium on Computer Architecture and High Performance Computing: SBAC-PAD 2018: proceedings: Lyon, France, 24-27 September 2018
First page
250
Last page
257
DOI
10.1109/CAHPC.2018.8645891
URL
https://ieeexplore.ieee.org/document/8645891 Open in new window
Abstract
Various servers with different characteristics and architectures are hitting the market, and their evaluation and comparison in terms of HPC features is complex and multidimensional. In this paper, we share our experience of evaluating a diverse set of HPC systems, consisting of three mainstream and five emerging architectures. We evaluate the performance and power efficiency using prominent HPC benchmarks, High-Performance Linpack (HPL) and High Performance Conjugate Gradients (HPCG), and expan...
Keywords
BytelFLOP ratio, Commerce, Computer architecture, Economic and social effects, Emerging architectures, Energy efficiency, HPC, High performance linpack, Memory latencies, Power efficiency, Quantitative result, System components, emerging and mainstream architectures, energy efficiency, memory latency and bandwidth, weak vs. strong cores, weak vs. strong cores Benchmarking
Group of research
ARCO - Microarchitecture and Compilers
CAP - High Performace Computing Group

Participants

  • Radulovic, Milan  (author and speaker )
  • Asifuzzaman, Kazi  (author and speaker )
  • Zivanovic, Darko  (author and speaker )
  • Rajovic, Nikola  (author and speaker )
  • Carpenter, Paul Matthew  (author and speaker )
  • Radojkovic, Petar  (author and speaker )
  • Ayguade Parra, Eduard  (author and speaker )