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Memory address prediction for data speculations

Author
González, J.; Gonzalez, A.
Type of activity
Presentation of work at congresses
Name of edition
3rd International European Conference on Parallel Computing
Date of publication
1997
Presentation's date
1997
Book of congress proceedings
Euro-Par'97 Parallel Processing: Third International Euro-Par Conference: Passau, Germany, August 26-29, 1997: proceedings
First page
1084
Last page
1091
DOI
https://doi.org/10.1007/BFb0002857 Open in new window
URL
http://link.springer.com/chapter/10.1007%2FBFb0002857 Open in new window
Abstract
Data speculation refers to the execution of an instruction before some logically preceding instructions on which it is data dependent. Data speculation implies some form of prediction of the data required by the speculative executed instruction and a recovering mechanism in case of misspeculation. This paper shows that load/store instructions are very good candidates for speculative execution since their effective address is highly predictable. We propose a novel technique called Memory Address ...
Keywords
Cache storage, Memory architecture, Performance evaluation, Storage allocation
Group of research
ARCO - Microarchitecture and Compilers

Participants