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Energy effective issue logic

Author
Folegnani, D.; Gonzalez, A.
Type of activity
Presentation of work at congresses
Name of edition
28th Annual International Symposium on Computer Architecture
Date of publication
2001
Presentation's date
2001
Book of congress proceedings
28th Annual International Symposium on Computer Architecture, 2001: proceedings
First page
230
Last page
239
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
DOI
https://doi.org/10.1109/ISCA.2001.937452 Open in new window
Repository
http://hdl.handle.net/2117/96649 Open in new window
URL
http://ieeexplore.ieee.org/document/937452/ Open in new window
Abstract
The issue logic of a dynamically-scheduled superscalar processor is a complex mechanism devoted to start the execution of multiple instructions every cycle. Due to its complexity, it is responsible for a significant percentage of the energy consumed by a microprocessor. The energy consumption of the issue logic depends on several architectural parameters, the instruction issue queue size being one of the most important. In this paper we present a technique to reduce the energy consumption of the...
Citation
Folegnani, D., González, A. Energy effective issue logic. A: Annual International Symposium on Computer Architecture. "28th Annual International Symposium on Computer Architecture, 2001: proceedings". Göteborg: Institute of Electrical and Electronics Engineers (IEEE), 2001, p. 230-239.
Keywords
Adaptive hardware, Energy consumption, Issue logic, Low power
Group of research
ARCO - Microarchitecture and Compilers

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