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Thermal-aware clustered microarchitectures

Author
Chaparro, P.; González, J.; Gonzalez, A.
Type of activity
Presentation of work at congresses
Name of edition
22nd IEEE International Conference on Computer Design: VLSI in Computers and Processors
Date of publication
2004
Presentation's date
2004
Book of congress proceedings
IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004, ICCD 2004: proceedings
First page
48
Last page
53
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
DOI
https://doi.org/10.1109/ICCD.2004.1347897 Open in new window
Repository
http://hdl.handle.net/2117/101429 Open in new window
URL
http://ieeexplore.ieee.org/document/1347897/ Open in new window
Abstract
As frequencies and feature size scale faster than operating voltages, power density is increasing in each processor generation. Power density and the cost of removing the heat it generates are increasing at the same rate. Leakage is significantly increasing every process generation and it is expected to be the main source of power in the near future. Moreover, leakage power grows exponentially with temperature. This paper proposes and evaluates several techniques with two goals: reduction of ave...
Citation
Chaparro, P., González, J., González, A. Thermal-aware clustered microarchitectures. A: IEEE International Conference on Computer Design: VLSI in Computers and Processors. "IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004, ICCD 2004: proceedings". San Jose, CA: Institute of Electrical and Electronics Engineers (IEEE), 2004, p. 48-53.
Keywords
Computer architecture, Cost reduction, Microprocessor chips, Thermal management (packaging)
Group of research
ARCO - Microarchitecture and Compilers

Participants

  • Chaparro, Pedro  (author and speaker )
  • González González, José  (author and speaker )
  • Gonzalez Colas, Antonio Maria  (author and speaker )

Attachments