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Disabling cache portions during low voltage operations - third continuation

Type of property
Invention patent
Number of request
10528473
Date of request
2020-01-07
Country
United States of America
Owner organization
Intel Corporation
Group of research
ARCO - Microarchitecture and Compilers

Participants

  • Wilkerson, Chris  (principal)
  • Khellah, Muhamad  (principal)
  • De, Vivek  (principal)
  • Zhang, Ming  (principal)
  • Abella Ferrer, Jaume  (principal)
  • Carretero Casado, Javier  (principal)
  • Chaparro, Pedro  (principal)
  • Vera, Xavier  (principal)
  • Gonzalez Colas, Antonio Maria  (principal)