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Speculative dynamic vectorization

Author
Pajuelo, M.A.; Gonzalez, A.; Valero, M.
Type of activity
Report
Date
2001-11
Code
UPC-DAC-2001-34
Abstract
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also present in irregular or pointer-rich codes, for which the compiler is quite limited to discover it. In this paper we propose a microarchitecture extension in order to exploit SIMD parallelism in a speculative way. The idea is to predict when certain operations are likely to be vectorizable, based on some previous history i...
Keywords
Control independence, Speculative data computation, Speculative dynamic vectorization, Vector instructions, Wide buses
Group of research
ARCO - Microarchitecture and Compilers
CAP - High Performace Computing Group
VIRTUOS - Virtualisation and Operating Systems