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Thread-management techniques to maximize efficiency in multicore and simultaneous multithreaded microprocessors

Author
Rakvic, R.N.; Cai, Q.; González, J.; Magklis, G.; Chaparro, P.; Gonzalez, A.
Type of activity
Journal article
Journal
ACM transactions on architecture and code optimization
Date of publication
2010-09-01
Volume
7
Number
2
First page
9:1
Last page
9:25
DOI
https://doi.org/10.1145/1839667.1839671 Open in new window
URL
http://dl.acm.org/citation.cfm?id=1839671&CFID=903744007&CFTOKEN=90908089 Open in new window
Abstract
We provide an analysis of thread-management techniques that increase performance or reduce energy in multicore and Simultaneous Multithreaded (SMT) cores. Thread delaying reduces energy consumption by running the core containing the critical thread at maximum frequency while scaling down the frequency and voltage of the cores containing noncritical threads. In this article, we provide an insightful breakdown of thread delaying on a simulated multi-core microprocessor. Thread balancing improves o...
Keywords
Critical threads, Energy-aware, Low-power, Meeting point thread characterization, Microarchitecture, Multi-threaded application, Thread balancing, Thread delaying
Group of research
ARCO - Microarchitecture and Compilers

Participants

  • Rakvic, Ryan N.  (author)
  • Cai, Qiong  (author)
  • González González, José  (author)
  • Magklis, Grigorios  (author)
  • Chaparro, Pedro  (author)
  • Gonzalez Colas, Antonio Maria  (author)