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Efficient interconnects for clustered microarchitectures

Author
Parcerisa, Joan-Manuel; Gonzalez, A.; Sahuquillo Borrás, Julio; Duato Marín, José Francisco
Type of activity
Report
Date
2001-11
Code
UPC-DAC-2001-32
Abstract
Clustering is an effective microarchitecture technique for reducing the impact of wire delays, reducing the complexity and the power requirements of microprocessors. In a clustered microarchitecture, a reduced inter-cluster communication latency is essential for high performance. In this work, we investigate the design of interconnection networks for clustered microarchitectures. We propose point-to-point interconnects together with an effective latency-aware steering scheme and show that they a...
Group of research
ARCO - Microarchitecture and Compilers

Participants