Loading...
Loading...

Go to the content (press return)

A clustered front-end for superscalar processors

Author
Parcerisa, Joan-Manuel; Gonzalez, A.; Smith, J.
Type of activity
Report
Date
2002-07
Code
UPC-DAC-2002-29
Abstract
Increasing wire delays, power consumption, complexity and clock skew calls for clustered organizations as a main feature of forthcoming microprocessors. Clustered microarchitectures are more scalable than centralized organizations, by trading-off latency, complexity and power consumption of each component for additional inter-cluster communications. This work proposes techniques for clustering the main components of the processor front-end, i.e. those involved in branch prediction, instruction f...
Group of research
ARCO - Microarchitecture and Compilers

Participants