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A detailed analysis and electrical modeling of gate oxide shorts in mos transistors

Author
Segura, J.; Benito, C.; Rubio, A.; Hawkins, C.
Type of activity
Journal article
Journal
Journal of electronic testing. Theory and applications
Date of publication
1996-06
Volume
8
Number
3
First page
229
Last page
239
DOI
https://doi.org/10.1007/BF00133386 Open in new window
URL
http://link.springer.com/article/10.1007%2FBF00133386 Open in new window
Abstract
The characteristics of devices with gate oxide short defects are investigated for both n-MOS and p-MOS transistors. Experimental results obtained from real and design induced gate oxide shorts are presented analyzing the defect-induced conduction mechanisms that determine the transistor behavior. It is shown that three variables (defect location, transistor type and gate polysilicon doping type) influence the characteristics of a defective device. Of interest is the prediction and observation of...
Keywords
Fault modeling, Gate oxide short, Physical defects
Group of research
HIPICS - High Performance Integrated Circuits and Systems

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