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Value compression for efficient computation

Autor
Canal, R.; Gonzalez, A.; Smith, J.
Tipus d'activitat
Article en revista
Revista
Lecture notes in computer science
Data de publicació
2005
Volum
3648
Pàgina inicial
519
Pàgina final
529
DOI
https://doi.org/10.1007/11549468_59 Obrir en finestra nova
URL
http://link.springer.com/chapter/10.1007/11549468_59 Obrir en finestra nova
Resum
A processor’s energy consumption can be reduced by compressing values (data and addresses) that flow through a processor pipeline and gating off portions of data path elements that would otherwise be used for computing non-significant bits. An approach for compressing all values running through a processor is proposed and evaluated. For the SpecInt2000 benchmarks the best compression method achieves energy savings of more than 20 percent and a peak power reduction of 18 percent.
Paraules clau
Data compression, Logic gates, Pipeline arithmetic
Grup de recerca
ARCO - Microarquitectura i Compiladors
VIRTUOS - Virtualisation and Operating Systems

Participants