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New redundant logic design concept for high noise and low voltage scenarios

Author
García, L.; Andrade, D.; Gomez, S.; Calomarde, A.; Moll, F.; Rubio, A.
Type of activity
Journal article
Journal
Microelectronics journal
Date of publication
2011-12
Volume
42
Number
12
First page
1359
Last page
1369
DOI
https://doi.org/10.1016/j.mejo.2011.09.007 Open in new window
Project funding
Design And Test Principles For Terascale Integrated Systems
Repository
http://hdl.handle.net/2117/14228 Open in new window
URL
http://www.sciencedirect.com/science/article/pii/S0026269211001960 Open in new window
Abstract
This paper presents a new redundant logia design concept named Turtle Logic(TL).It is a new probabilistic logic method based on port redundancy and complementary data, oriented toward emerging technologies beyond CMOS, where the thermal noise could be predominant and the reliability of the future circuits could be limited. The TL is a technology independent method, which aims to improve error tolerance when these errors are caused by noise within logic and functional units, sequential elements,...
Citation
García, L. [et al.]. New redundant logic design concept for high noise and low voltage scenarios. "Microelectronics journal", Desembre 2011, vol. 42, núm. 12, p. 1359-1369.
Group of research
HIPICS - High Performance Integrated Circuits and Systems

Participants