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A high-performing hardware transactional memory system with swapping execution modes

Author
Lupon, M.; Gonzalez, A.
Type of activity
Report
Date
2011-09-19
Code
UPC-DAC-RR-ARCO-2011-6
Abstract
Most Hardware Transactional Memory (HTM) systems establish the data versioning mechanism at design time. This strategy forces each instance of a transaction to execute under the same policy from its very beginning, which not only introduces performance overheads such as data movements at commit or abort time, but restricts the way the system handles conflicts involving that transaction.
Group of research
ARCO - Microarchitecture and Compilers

Participants