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Light-weight optimizations for eager hardware transactional memory systems

Author
Lupon, M.; Gonzalez, A.
Type of activity
Report
Date
2011-09-19
Code
UPC-DAC-RR-ARCO-2011-7
Abstract
In this paper, we present two optimization for eager HTM systems: wake-up notification and selective logging. The former suggests a new convention to stop polling on onflicting transactions and send point-to-point notifications then the data is ready instead. The latter proposes novel mechanism that adds to the software-resident log only the speculatively modified lines that overflow the ransactional L1 cache, which reduces the size of the software log.
Group of research
ARCO - Microarchitecture and Compilers

Participants