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The migration prefetcher: anticipating data promotion in dynamic NUCA caches

Author
Lira, J.; Jones, T.; Molina, C.; Gonzalez, A.
Type of activity
Journal article
Journal
ACM transactions on architecture and code optimization
Date of publication
2012-01
Volume
8
Number
4
First page
1
Last page
20
DOI
https://doi.org/10.1145/2086696.2086724 Open in new window
Repository
http://hdl.handle.net/2117/16508 Open in new window
URL
http://dl.acm.org/citation.cfm?doid=2086696.2086724 Open in new window
Abstract
The exponential increase in multicore processor (CMP) cache sizes accompanied by growing on-chip wire delays make it difficult to implement traditional caches with a single, uniform access latency. Non-Uniform Cache Architecture (NUCA) designs have been proposed to address this problem. A NUCA divides the whole cache memory into smaller banks and allows banks nearer a processor core to have lower access latencies than those further away, thus mitigating the effects of the cache's internal wires....
Citation
Lira, J. [et al.]. The migration prefetcher: anticipating data promotion in dynamic NUCA caches. "ACM transactions on architecture and code optimization", Gener 2012, vol. 8, núm. 4, p. 1-20.
Keywords
Design, Management, Memory hierarchy, NUCA, Performance, cache memory, migration, prefetching
Group of research
ARCO - Microarchitecture and Compilers

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