Loading...
Loading...

Go to the content (press return)

Scientific and technological production

1 to 8 of 8 results
 
  • An empirical evaluation of High-Level Synthesis languages and tools for database acceleration  Open access

     Arcas Abella, Oriol; Ndu, G.; Sonmez, N.; Ghasempour, M.; Armejach, A.; Navaridas, J.; Song, W.; Mawer, J.; Cristal, A.; Lujan, Mikel
    International Conference on Field Programmable Logic and Applications
    p. 1-8
    DOI: 10.1109/FPL.2014.6927484
    Presentation of work at congresses
    Loading...
    Access to the full text
  • Techniques to improve performance in requester-wins hardware transactional memory

     Armejach, A.; Titos, R.; Negi, A.; Unsal, O.; Cristal, A.
    ACM transactions on architecture and code optimization
    Vol. 10, num. 4, p. 1-25
    DOI: 10.1145/2555289.2555299
    Date of publication: 2013-12
    Journal article
    Loading...
  • Computación de Altas Prestaciones VI

     Valero, M.; Guitart, J.; Monreal, T.; Herrero, J.; Ayguade, E.; Labarta, J.; Badia, R.M.; Martorell, X.; Jimenez, D.; Alvarez, C.; Maric, B.; Rajovic, N.; Pavlovic, M.; Rico, A.; Puzovic, N.; Gelado, I.; Sancho, J.C.; Smiljkovic, V.; Nou, R.; Gimenez, J.; Yazdanpanah, F.; Moreto, M.; Verdu, J.; Planas, J.; Gayatri, R.; Berna, A.; Kestor, G.; Fitó, O.; Kosmidis, L.; Alvanos, M.; Ferrer, R.; Duran, A.; Bueno, J.; Macias, M.; Grass, T.; Beltran, V.; Polo, J.; Garcia, M.; Llosa, J.; Corbalan, J.; Gil, Marisa; Torres, J.; Sánchez, F.; Ramírez , A.; Olive, A.; Jimenez, M.; Fernandez, A.; Cortes, A.; Navarro, J.; Llaberia, J.; Navarro, N.; Jokanovic, A.; Poggi, N.; Sanchez, F.; Becerra, Y.; Carrera, D.; Gonzalez, M.; Morancho, E.; Pajuelo, M.A.; Costa, J.; Pérez, J.; Cristal, A.; González, J.; Marti, J.; Gioiosa, R.; Duric, M.; Stanic, M.; Sonmez, N.; Hussain, T.; Gajinov, V.; Tomic, S.; Arcas Abella, Oriol; Stipic, S.; Karakostas, V.; Hayes, T.; Armejach, A.; Yalcin, G.; Nemirovsky, D.; Bertran, R.; Alvarez, Ll.; Morari, A.; Subotic, V.; Seyedi, A.; Jorda, M.; Giralt, J.; Jalle, J.; Milic, U.; Tanasic, I.; Utrera, G.; Casas, M.; Tous, R.; Villalba, Á.; Brugger, M.; Cazorla, F. J.; Jaulmes, L.; Quiñones, E.; Elangovan, V.; Ejarque, J.; Bellens, P.; Sirvent, R.; Lezzi, D.; Liu, Q.; Radojkovic, P.; Panic, M.; Cakarevic, V.; Abella, J.; Ciesko, J.; Tejedor, E.; Cabezas, J.; Roca, D.; Allande, C.; Marjanovic, V.; Ratkovic, I.; Servat, H.; Vilanova, L.; Llort, G.; Unsal, O.; Markovic, N.; Jiménez, V.; Garcia, V.; Reig, G.; Miranda, A.; Farreras, M.; Artiaga, E.; Teruel, J.; Caballero, D.; Subirats, J.
    Competitive project
    Loading...
  • Novel SRAM bias control circuits for a low power L1 data cache

     Seyedi, A.; Armejach, A.; Cristal, A.; Unsal, O.; Valero, M.
    NORCHIP Conference: the Nordic Microelectronics Event
    p. 1-6
    DOI: 10.1109/NORCHP.2012.6403113
    Presentation's date: 2012-11
    Presentation of work at congresses
    Loading...
  • Circuit design of a dual-versioning L1 data cache

     Seyedi, A.; Armejach, A.; Cristal, A.; Unsal, O.; Hur, I.; Valero, M.
    Integration. The VLSI journal
    Vol. 45, num. 3, p. 237-245
    DOI: 10.1016/j.vlsi.2011.11.015
    Date of publication: 2012-06
    Journal article
    Loading...
  • Using a reconfigurable L1 data cache for efficient version management in hardware transactional memory

     Armejach, A.; Seyedi, A.; Titos, R.; Hur, I.; Cristal, A.; Unsal, O.; Valero, M.
    International Conference on Parallel Architectures and Compilation Techniques
    p. 361-371
    DOI: 10.1109/PACT.2011.67
    Presentation's date: 2011-10
    Presentation of work at congresses
    Loading...
  • Circuit design of a dual-versioning L1 data cache for optimistic concurrency

     Seyedi, A.; Armejach, A.; Cristal, A.; Unsal, O.; Hur, I.; Valero, M.
    Great Lakes Symposium on VLSI
    p. 325-330
    DOI: 10.1145/1973009.1973074
    Presentation's date: 2011-05
    Presentation of work at congresses
    Loading...
  • EazyHTM: EAger-LaZY hardware transactional memory

     Tomic, S.; Perfumo, C.; Kulkami, C.; Armejach, A.; Cristal, A.; Unsal, O.; Harris, T.; Valero, M.
    Annual IEEE/ACM International Symposium on Microarchitecture
    p. 145-155
    Presentation's date: 2009-12
    Presentation of work at congresses
    Loading...