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Scientific and technological production

1 to 4 of 4 results
 
  • Reimagining heterogeneous computing: A functional instruction set architecture (F-ISA) computing model

     Nemirovsky, D.; Markovic, N.; Unsal, O.; Valero, M.; Cristal, A.
    IEEE micro
    p. 1-13
    DOI: 10.1109/MM.2015.128
    Date of publication: 2015-11-11
    Journal article
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  • The VELOX transactional memory stack  Open access

     Felber, P.; Riviere, E.; Moreira, W.; Harmanci, D.; Marlier, P.; Diestelhorst, S.; Hohmuth, M.; Pohlack, M.; Cristal, A.; Hur, I.; Unsal, O.; Stenström, P.; Dragojevic, A.; Guerraoui, R.; Kapalka, M.; Gramoli, V.; Drepper, U.; Tomic, S.; Afek, Y.; Korland, G.; Shavit, N.; Fetzer, C.; Nowack, M.; Riegel, T.
    IEEE micro
    Vol. 30, num. 5, p. 76-87
    DOI: 10.1109/MM.2010.80
    Date of publication: 2010-09
    Journal article
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  • Transactional memory: an overview

     Harris, T.; Cristal, A.; Unsal, O.; Ayguade, E.; Gagliardi, F.; Smith, B.; Valero, M.
    IEEE micro
    Vol. 27, num. 3, p. 8-29
    DOI: 10.1109/MM.2007.63
    Date of publication: 2007-05
    Journal article
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  • Kilo-instruction processors: overcoming the memory wall  Open access

     Cristal, A.; Santana, O.; Cazorla, F. J.; Galluzzi, M.; Ramirez, T.; Pericas, M.; Valero, M.
    IEEE micro
    Vol. 25, num. 3, p. 48-57
    DOI: 10.1109/MM.2005.53
    Date of publication: 2005-05
    Journal article
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